# RUN: llc -mtriple=amdgcn-- -run-pass=print-machine-uniformity -o - %s 2>&1 | FileCheck %s

# CHECK-LABEL: MachineUniformityInfo for function: irreducible
# CHECK: CYCLES ASSSUMED DIVERGENT:
# CHECK:   depth=1: entries(bb.2 bb.1) bb.3 bb.5 bb.4
# CHECK: CYCLES WITH DIVERGENT EXIT:
# CHECK-DAG:   depth=1: entries(bb.2 bb.1) bb.3 bb.5 bb.4
# CHECK-DAG:   depth=2: entries(bb.3 bb.1) bb.5 bb.4

---
name:            irreducible
tracksRegLiveness: true
machineFunctionInfo:
  isEntryFunction: true
body:             |
  bb.0:
    successors: %bb.1, %bb.2
    liveins: $vgpr0, $vgpr1, $vgpr2, $sgpr4_sgpr5, $sgpr6_sgpr7, $sgpr8_sgpr9, $sgpr10_sgpr11, $sgpr14, $sgpr15, $sgpr16

    %0:sreg_32 = IMPLICIT_DEF
    %2:vgpr_32 = COPY $vgpr0
    %3:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
    S_CMP_EQ_U32 %0, 0, implicit-def $scc
    S_CBRANCH_SCC1 %bb.1, implicit $scc
    S_BRANCH %bb.2

  bb.1:
    %28:vgpr_32 = PHI %3, %bb.0, %49, %bb.5
    %29:vgpr_32 = V_ADD_U32_e64 %28, 1, 0, implicit $exec
    S_BRANCH %bb.3

  bb.2:
    %38:vgpr_32 = PHI %3, %bb.0, %49, %bb.4
    %39:vgpr_32 = V_ADD_U32_e64 %38, 2, 0, implicit $exec

  bb.3:
    %49:vgpr_32 = PHI %29, %bb.1, %39, %bb.2

  bb.4:
    successors: %bb.2, %bb.5

    %50:vgpr_32 = V_AND_B32_e32 3, %2, implicit $exec
    %51:sreg_64 = V_CMP_EQ_U32_e64 %50, 2, implicit $exec
    %52:sreg_64 = SI_IF killed %51:sreg_64, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec

  bb.5:
    successors: %bb.1, %bb.6
    %61:sreg_64 = V_CMP_EQ_U32_e64 %50, 1, implicit $exec
    %62:sreg_64 = SI_IF killed %61:sreg_64, %bb.1, implicit-def dead $exec, implicit-def dead $scc, implicit $exec

  bb.6:
    S_ENDPGM 0
...
